This page is dedicated to digital subtraction.
Unlike a half-adder, the carry bit is SUBTRACTED from the next place to the left, not added to it.
Bit 1 | Bit 2 | Output | Carry |
0 | 0 | 0 | 0 |
0 | 1 | 1 | 1 |
1 | 0 | 1 | 0 |
1 | 1 | 0 | 0 |
Below is a circuit wich fulfills the rules of binary subtraction. If bit 2 but not 1 is 1, there is a carry bit which should be subtracted from the next bit to the left. If only one of the bits is 1, then the output is 1.
Notes: Bits 321-3a2a1a=Sign 3b2b1b
By cascading half-subtracters and connecting them with or gates, it is possible to make a
"full
subtracter" (above). If the sign bit is 1, the answer is negative. Otherwise, It's positive.