PRACTICAL RESULTS
Lab 5B

1.2    No, because the output is forced to be at Q=0 and Q^=1 due to the overriding action at PR=1 and
        CLR=0 which disables clock operation.

1.3
 

            Yes.

1.4    Q=1, Q^=0
         No, 'same as 1.2' but PR=0 and CLR=1.
 

2.0
2.2    Q=0. Q^=1
         No, 'same as 1.2'

2.3
 

2.4    Q=1, Q^=0
         No, 'same as 1.4'
         No, 'same as 1.4'
 

3.0    T Flip-flop
3.3    Q=0 and Q^=1

 

3.4