Paulo J. TAVARES
29 years old, unmarried
Portuguese national

Av. Luiz de Tella 1526, CEP 13083-550, Campinas–SP, Brazil
paulo.tavares@ieee.org    www.geocities.com/pjmtavares
+55 19 9700-6200 +55 19 3287-0032

Professional Experience:

Since Nov. 1998: Instituto Nacional de Tecnologia da Informação (National Institute for Information Technology), in Campinas (Brazil). Working in the Laboratory of Hardware Systems Design, on the analysis and design of analog and digital circuits, both with microelectronic and PCB implementations. Also worked on the development of a mixed-signal circuit simulator, part of a software package for the design of gate array integrated circuits.
April 1997
to
Nov. 1998:		 Research grant at the Instituto de Telecomunicações (Telecommunications Institute) of Lisbon. In the Power Systems for Telecommunications group, collaborated in the design and application of smart power integrated circuits. These are part of a new generation of power circuits, which integrate control modules and power transistors in a single chip, using the same inexpensive technology of CMOS digital circuits.
1996: Junior engineer at the Hutchinson Research Centre of Montargis, France (Hutchinson, a French subsidiary of TOTAL, is the European leader in the transformation of elastomers). Responsible for the development and implementation of algorithms for the automatic inspection of rubber components, using both computer vision techniques and artificial neural networks.
1993
to
1998:
(except 1996)		 Freelance translator (English and French to Portuguese) for Gestinfor Lda, (documentation of a graphic arts software package), and more regularly for Traducis Lda. (numerous Ford technical newsletters and several software manuals for the usage of members of the European Parliament).

Formal Education:


Enrolled in a M.Sc. in Electrical Engineering and Computer Science, specializing in Microelectronics, at Unicamp — State University of Campinas, Brazil.
Estimated conclusion: May 2002

Engineering degree (5-years licenciatura) in Electrical Engineering and Computer Science (concluded in September 1995), specializing in Control and Robotics, at IST — Technical University of Lisbon.
Grade average: 15 out of 20.

Complementary Education and Activities:

7 to 10 August 2001 Intercon 2001 – VIII Congreso Internacional de Ingeniería Electrónica, Elétrica y de Sistemas: International congress on electrical and electronics engineering, held in Piura (Peru). Presented there a tutorial course on Smart Power, covering power devices and circuits, VHDL and MEMS applications.
1 to 3 August 2001 2001 IMAPS Brazil – International Technical Symposium on Packaging and Assembling: Held in São Paulo (Brazil). Attended two Professional Development Courses:
  • Measuring Printed Wiring Board Fabrication Performance

    •    (half day, presented by Charles E. Bauer, Ph.D., TechLead Corporation)
  • SMT Mass Soldering

    •    (half day, presented by Phil Zarrow, ITM Inc. & TechLead Corporation)
    21 to 23 March 2001 VII Workshop IBERCHIP: International congress held in Montevideo (Uruguay). Presented there a technical paper (see List of Publications).
    21 to 23 February 2001 Designing with FPGA Advantage: A Mentor Graphics Corporation training course, held in Boston and focusing on software tools like Renoir and Leonardo Spectrum. Presented by Dale Fisk, a Mentor Graphics instructor.
    20 to 24 March 2000 Interfacing Microsystems: A short course integrated in the VI Iberchip Workshop, held in Florianópolis (Brazil).
    3 to 7 May 1999 V Escola Brasileira de Microeletrônica: Event organized by SBm (the Brazilian Microelectronics Society), focusing on recent developments in microelectronics and micromechanical systems, held at the Laboratório Nacional de Luz Síncrotron — Brazilian Synchrotron Light Source — in Campinas (Brazil).
    25 February 1999 Practical Design for Xilinx: Xilinx international seminar sponsored by Insight Electronics, held in Porto Alegre (Brazil).
    10 to 14 August 1998 ICMP’98 – International Conference on Microelectronics and Packaging: Organized by SBm (Brazilian Microelectronics Society), IMAPS (International Microelectronics and Packaging Society) and LAC (Central Laboratory for Electricity and Electronics), in Curitiba (Brazil).
    7 November 1997 Electromagnetic Interference: Course organized by IEEE (Institute of Electrical and Electronics Engineers), IT (Telecommunications Institute), and IST, held in Lisbon. Attended two modules:
  • Techniques for the control of interference in digital circuits

    •    (12 hours, presented by Menna Barreto, engineer at Portugal Telecom)
  • Measurement techniques

    •    (16 hours, presented by Alfred Schmid, engineer and consultant from Rohde & Schwarz)

    Specific Technical Skills:

    General purpose languages: C, C++, Pascal, BASIC, Lisp
    Specialized languages:  VHDL, Lex, YACC, G (LabView), MATLAB
    Simulation and mathematical software:  SPICE, SaberDesigner, Mentor Graphics (DA, Accusim and QuickHDL), MATLAB/Simulink, etc.
    Ancillary software: MS/Word, LaTeX, Excel, PowerPoint, etc.
    Operating systems:  Unix (Solaris), MS/Windows, MS/DOS and VAX/VMS.
    Hardware:  Microchip PIC MCUs and their assembly language, WE DSP32 signal processor and its assembly language, Matrox MAGIC frame grabber, National Instruments DAQCard-1200 data acquisition board 

    Language Skills:

    French: Fluency (a year spent in France, working as an engineer).
    Spanish: Fluency (portuguese language is a close kin. Also had numerous contacts with spanish speakers and some experience with oral presentations).
    English: Fluency (technical translations, score of 673/700 at TOEFL and 5/6 at TWE, short stays in the UK and USA, experience with oral presentations).
    German: Basic knowledge (taking lessons for the 3rd semester).
    Portuguese: Native speaker.

    Affiliation to Professional Societies:

    Portuguese national engineering society: Junior member
    The Institute of Electrical and Electronics Engineers: Member

    List of Publications:


    " High Performance NMOS Active Zener and Rectifier Diodes "
    S. Finco, A. P. Casimiro, P. M. Santos, P. Tavares, and M. I. Castro Simas
    To be presented at the IEEE IAS 36th Annual Meeting, held in September 2001, in Chicago.

    " Simulation of Basic Semiconductor Devices Using Matlab "
    P. Tavares, A. M. Jorge, and S. Finco
    Presented at the VII Workshop IBERCHIP, held in March 2001, in Montevideo.

    " Integration Strategies for Smart Power Fast Prototyping "
    A. P. Casimiro, S. Finco, P. Tavares, F. Behrens, and M. I. Castro Simas
    Presented at the IEEE Industry Applications Society 35th Annual Meeting (IAS 2000), held in October 2000, in Rome.

    " Microsystem for Biomedical Application Using Cost Effective Smart Power Strategies"
    P. Tavares, S. Finco, F. Behrens, L. E. Seixas, A. P. Casimiro, and M. I. Castro Simas
    Technical Digest of the International Conference on Microelectronics and Packaging (ICMP 99), pp. 145–150, August 1999, Campinas – Brazil

    " Smart Power ICs Fast Prototyping for Portable Telecommunications "
    A. Casimiro, S. Finco, P. Tavares, F. Behrens, C. Mammana, and M. Simas
    II Conference on Telecommunications (ConfTele99), pp. 281–286, April 1999, Sesimbra – Portugal.

    " Smart Power: A Perspective for Semicustom Approach"
    S. Finco, F. Behrens, P. Tavares, M. I. Castro Simas, and C. I. Z. Mammana
    Memorias of the Fifth Iberchip Workshop (Iberchip 99), pp. 342–349, March 1999, Lima.

    " A New Concept for Cost Effective Smart Power ICs Based on a Unique Cell Type"
    S. Finco, P. Tavares, P. Casimiro, P. Santos, F. Behrens, and M. I. Castro Simas
    Proceedings of the IEEE Industry Applications Society 33rd Annual Meeting (IAS 98), pp. 1111–1118, October 1998, St. Louis – Missouri.

    " A Cost Effective Smart Power Approach with NMOS Based Blocks in Standard CMOS Technology"
    S. Finco, P. Tavares, P. Santos, A. P. Casimiro, F. Behrens, M. Lança, and M. I. Castro Simas
    Proceedings of the 5th IEEE International Conference on Electronics, Circuits and Systems (ICECS 98), vol. II pp. 135–138, September 1998, Lisbon.

    " Sliding Mode Control of an AUV in the Diving Plane "
    (co-authored with Luis Rodrigues and Miguel Prado)
    Proceedings of the 2nd Portuguese Conference on Automatic Control - Controlo 96, vol. II pp. 757–762, September 1996, Oporto – Portugal.

    " Sliding Mode Control of an AUV in the Diving and Steering Planes "
    (co-authored with Luis Rodrigues and Miguel Prado)
    Proceedings of OCEANS 96 MTS/IEEE, vol. 2 pp. 576–583, September 1996, Fort Lauderdale – USA.

    " Neural Network Based Control of Biped Locomotion, Genetic Algorithm Optimization "
    (co-authored with Luis Rodrigues, Miguel Prado, Kelo da Silva, Pedro Lima, and Agostinho Rosa)
    Proceedings of the 2nd Portuguese Conference on Automatic Control - Controlo 96, vol. II pp. 815–820, September 1996, Oporto – Portugal.

    " Simulation and Control of Biped Locomotion – GA Optimization "
    (co-authored with Luis Rodrigues, Miguel Prado, Kelo da Silva, and Agostinho Rosa)
    Proceedings of the 1996 IEEE International Conference on Evolutionary Computation (ICEC’96), pp. 390–395, May de 1996, Nagoya – Japan.

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    I invite you to also take a look at my personal homepage.

    This page was last updated in August 2001.


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