The frequency of clock interrupt makes it so that we can't afford to do much (not even make a subroutine call) on every clock interrupt. Thus, XINU (and many other operating systems) does not do regular clock interrupt processing on every clock interrupt. Instead, XINU on the PDP-11 will count up clock interrupts until a certain number have arrived (in this case, 6). Every 6th interrupt will then cause regular clock servicing to occur. For the other 5 of the 6 the ISR simply adds one to the sum and returns.
The effect is that the clock interrupt frequency is divided by 6. This creates an effective interrupt rate of 10 per second. The tradeoff is clear - the clock processing overhead is reduced, and the granularity of the timer is increased (giving us less accurate timings).
The need to do this most certainly depends on the speed of the processor. Current processors are so much faster that this code is often NOT IMPLEMENTED, or the implemented, but NEVER CALLED. As you see in the clock interrupt handler, the call to wakeup is done on every clock tick, and even more. But care must be taken so as to not do too much work on every clock interrupt
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