XINU for the PDP-11 (and family) has three low-level interrupt dispatching routines:

• An input interrupt dispatcher
• An output interrupt dispatcher
• A clock interrupt dispatcher

This means that all input interrupts vector to the same dispatcher. Likewise for all output interrupts, regardless of which input or output device generated the interrupt. The diagram below depicts this arrangement:

This chapter discusses only the input and output dispatcher. Let's look at these now. The code and description for the PC VERSION is in the textbook. Unfortunately, the version of the code that we have is not configured with many of the routines described in Chapter 9 of the PC-XINU textbook. Where appropriate, we will discuss some particular details about the PC architecture, but leave most of the details out, because there is no actual code to view.