In this section, we will introduce some of the main components of the common bus architectures for the IBM PC family of computers.
This bus architecture is designed for both memory and I/O. Peripheral Devices are attached to the bus and can be programmed, or set to send a signal on an IRQ line. One method of setting is a DIP switch (hard setting), or a configuration setting in a start up program.
There are several types of lines on this bus. They have the following functions:
This architecture has 64 multiplexed address/data lines. You can't use these lines for address and data at the same time. Only 32 bit addresses are used, but 64 bits of data can be transferred in parallel.
It is capable of transferring 1 quadword per clock cycle once a transfer is started. At a bus clock speed of 33 MHz, this bus is capable of 264 MBytes per second
Other Busses used in Personal Computers