design by

Ky Nguyen and Irene Sierra

The main goal of this project is to design a Kitchen Controller that has the capable of taking inputs from users in the form of minutes and seconds and displaying the results via a set of 7-segment LEDs.  The controller will perform the count down when the users press on the StartStop button.  The output buzzer will activate when the count down has reached zero.  The circuitry for the main controller and the LEDs is to be implemented through VLSI substrate level technology.  The design process is to be implemented using several software including but not limited to Verilog, IC Station, Lsim, AutoLogic II, and ModelSim on a Sun Sparc Station. 

Approach:

The logic of the Kitchen Controller was to be determined using block diagrams that would be created using Pspice to establish a foundation for the Verilog Code.  The Verilog Code would then be used to implement a Modulo 60, 2X1 Multiplexer, and 2 BCD decoders.   The design was then to be implemented in ModelSim and Xilinx for functional verification.  After functional verification was completed, the Verilog code would then be implemented in Auto Logic II to synthesize into gate level.  The gate level schematic was then to be imported into IC Station for layout.  After the design layout, a netlist was then to be extracted.   Lsim was then to be used to simulate layout for verification of functional ability. 

Procedure: 

A rough sketch of the block diagram was generated by hand to obtain the overall concept of the project.  The sketch was entered into Pspice for documentation purposes.  This block diagram concept was used as a foundation for entering the design into Verilog.  The top module of the Kitchen Controller consists of instantiations of the Modulo 60, 2X1 Multiplexer, BCD decoders, and several primitive gates.  The Verilog verification was completed without any conflicts.  From the Verilog code, we were able to obtain the gate level for the Kitchen Controller using Auto Logic II.  The design was flatten and optimized to minimize the area.  The schematic was imported into IC Station to obtain the entire layout.   The layout was complete using Auto Layout and Auto Route.  A drc check was performed to confirm that there no known errors in the design.  Furthermore, a netlist was extracted for Lsim simulation. 

Simulation Results:

The results of the simulations showed that the Kitchen Controller was functional.  See simulation waveforms for more details.

Analysis:

From the layout it was determined that two output pins had been combined during the optimization process.  These two outputs pins are: MinMSB[3] and SecMSB[3].  Output signal MinMSB[0] should be split to form output signal MinMSB[3].  Similarly, output signal SecMSB[0] should be split to form output signal SecMSB[3].   

Feature Identification:

Several features was discovered in Lsim:

1.      Combine several signals into a bus was implemented using the following command:

bus SECLSB x SecLSB(6) SecLSB(5) SecLSB(4) SecLSB(3) SecLSB(2)  

SecLSB(1) SecLSB(0)

2.       Remove unwanted signals from a probe window using the following   

      command:

 purge dCareCout;

3.      Repeat a logic pulse using the following command:

      lpulse Clk60Hz L H 20 1 1 25 50;

See Lsim script file for more details.

Conclusion:

The kitchen controller is a working design at an area cost of approximately 3mmX3mm.  In order for the design to be manufactured, the area would have to be reduced to 2mmX2mm.